(China (Mainland))
Product Summary
The 74HC573PW is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC573PW has octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all latches.
Parametrics
74HC573PW absolute maximum ratings: (1)VCC supply voltage: 2.0 to 6.0 V; (2)Tamb ambient temperature: -40 to +125 ℃; (3)VCC supply voltage: -0.5 +7 V; (4)ICC quiescent supply current: 70 mA; (5)IGND ground current: -70 mA.
Features
74HC573PW features: (1)Inputs and outputs oopposite sides of package allowing easy interface with microprocessors; (2)Useful as input or output port for microprocessors and microcomputers; (3)3-state non-inverting outputs for bus oriented applications; (4)Commo3-state output enable input; (5)Functionally identical to 74HC563; 74HCT563 and 74HC373; 74HCT373; (6)Complies with JEDEC standard no. 7A.
Diagrams
<IMG border=0 alt="74HC573PW block diagram" src="http://www.seekic.com/uploadfile/ic-mfg/201210294929471.jpg">
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 74HC573PW,112 |
NXP Semiconductors |
Latches OCTAL TRANS LATCH INV 3-S |
Data Sheet |
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74HC573PW,118 |
NXP Semiconductors |
Latches OCT D LATCH INV 3ST |
Data Sheet |
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