Product Summary
The 74HC/HCT595 are high-speed Si-gateCMOSdevices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift register and storage register have separate clocks.
Data is shifted on the positive-going transitions of the SH_CP input. The data in each register is transferred to the storage register on a positive-going transition of the ST_CP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
The shift register has a serial input (DS) and a serial standard output (Q7') for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW.
Features
8-bit serial input
· 8-bit serial or parallel output
· Storage register with 3-state outputs
· Shift register with direct clear
· 100 MHz (typical) shift out frequency
· ESD protection:HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V.
Diagrams
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Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
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74HC595 |
Other |
Data Sheet |
Negotiable |
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74HC595BQ,115 |
NXP Semiconductors |
Counter Shift Registers 8-BIT SHIFT REGISTER |
Data Sheet |
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74HC595D |
Other |
Data Sheet |
Negotiable |
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74HC595D,112 |
NXP Semiconductors |
Counter Shift Registers 8BIT SHIFT REGISTER W/OUTPUT LATCH |
Data Sheet |
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74HC595D,118 |
NXP Semiconductors |
Counter Shift Registers 8-BIT SHIFT REG W/OUTPUT LATCH |
Data Sheet |
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74HC595DB |
NXP Semiconductors |
Counter Shift Registers 8-BIT SHIFT REGISTER |
Data Sheet |
Negotiable |
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74HC595DB,112 |
NXP Semiconductors |
Counter Shift Registers 8-BIT SHIFT REGISTER |
Data Sheet |
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74HC595DB,118 |
NXP Semiconductors |
Counter Shift Registers 8-BIT SHIFT REG |
Data Sheet |
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