CY7C63801-SXC

Product Summary

The CY7C63801-SXC is an enCoRe II Low-Speed USB Peripheral Controller. The applications of the CY7C63801-SXC include PC HID devices, Mice (optomechanical, optical, trackball), Gaming, Joysticks, Game pad, General purpose, Barcode scanners, POS terminal, Consumer electronics, Toys, Remote controls, Security dongles.

Parametrics

CY7C63801-SXC asbolute maximum ratings: (1)Storage Temperature: -40℃ to +90℃; (2)Ambient Temperature with Power Applied: 0℃ to +70℃; (3)Supply Voltage on VCC Relative to VSS: -0.5V to +7.0V; (4)DC Input Voltage: -0.5V to +VCC +0.5V; (5)DC Voltage Applied to Outputs in; (6)High-Z State: -0.5V to +VCC +0.5V; (7)Maximum Total Sink Current into Port 0 and Port 1 pins: 70 mA; (8)Maximum Total Source Output Current into GPIO Pins: 30 mA; (9)Maximum On-chip Power Dissipation; (10)on any GPIO Pin: 50 mW; (11)Power Dissipation: 300 mW; (12)Static Discharge Voltage: 2200V; (13)Latch-up Current: 200 mA.

Features

CY7C63801-SXC features: (1)USB 2.0-USB-IF certified (TID # 40000085); (2)enCoReTM II USB - “enhanced Component Reduction”, Crystalless oscillator with support for an external clock. The internal oscillator eliminates the need for an external crystal or resonator; Two internal 3.3V regulators and an internal USB pull up resistor; Configurable IO for real world interface without external components; (3)USB Specification Compliance, Conforms to USB Specification, Version 2.0; Conforms to USB HID Specification, Version 1.1; Supports one Low-Speed USB device address; Supports one control endpoint and two data endpoints; Integrated USB transceiver with dedicated 3.3V regulator for USB signalling and D-pull up.; (4)Enhanced 8-bit microcontroller, Harvard architecture; M8C CPU speed is up to 24 MHz or sourced by an external; (5)clock signal; (6)Internal memory, Up to 256 bytes of RAM; Up to eight Kbytes of Flash including EEROM emulation; (7)Interface can auto configure to operate as PS/2 or USB, No external components for switching between PS/2 and USB modes; No General Purpose IO (GPIO) pins needed to manage dual mode capability; (8)Low power consumption, Typically 10 mA at 6 MHz; 10 μA sleep; (9)In system reprogrammability: Allows easy firmware update; (10)GPIO ports, Up to 20 GPIO pins; 2mA source current on all GPIO pins. Configurable 8 or 50 mA/pin current sink on designated pins; Each GPIO port supports high impedance inputs, configurable pull up, open drain output, CMOS/TTL inputs, and; (11)CMOS output; Maskable interrupts on all IO pins; (12)A dedicated 3.3V regulator for the USB PHY. Aids in signalling; (13)and D– line pull up; (14)125 mA 3.3V voltage regulator powers external 3.3V devices; (15)3.3V IO pins, 4 IO pins with 3.3V logic levels; Each 3.3V pin supports high impedance input, internal pull up, open drain output or traditional CMOS output; (16)SPI serial communication, Master or slave operation; Configurable up to 4 Mbit/second transfers in the master mode; Supports half duplex single data line mode for optical sensors; (17)2-channel 8-bit or 1-channel 16-bit capture timer registers.; (18)Capture timer registers store both rising and falling edge times, Two registers each for two input pins; Separate registers for rising and falling edge capture; Simplifies the interface to RF inputs for wireless applications; (19)Internal low power wakeup timer during suspend mode: Periodic wakeup with no external components; (20)12-bit Programmable Interval Timer with interrupts; (21)Advanced development tools based on Cypress MicroSystems PSoC. tools; (22)Watchdog timer (WDT); (23)Low voltage detection with user configurable threshold voltages; (24)Operating voltage from 4.0V to 5.5VDC; (25)Operating temperature from 0–70℃; (26)Available in 16 and 18-pin PDIP; 16, 18, and 24-pin SOIC; 24-pin QSOP, and 32-pin QFN packages; (27)Industry standard programmer support.

Diagrams